1. Field of the Invention
The present invention relates in general to the field of telecommunications, and more particularly, to a Hybrid balance and Combination codec filter (HCOMBO) circuit that performs analog-to-digital and digital-to-analog conversion, impedance matching and hybrid balance in a subscriber line interface.
2. Description of the Prior Art
Subscriber line interface circuits (SLIC) are customarily found in the central office exchange of a telecommunications network. The SLIC weds the digital switching network of the central office exchange to a plurality of analog subscriber lines. The analog subscriber lines connect to subscriber stations or instruments found at subscriber locations remote from the central office exchange.
The SLIC functions to supply power to a subscriber station and to transmit and receive voice signals between the digital switching network and the subscriber station.
Modern solid state SLICs are constructed using specialized integrated circuits. This construction dispenses with the need for inductive components in the analog end of the interface. The operating environment of the SLIC includes a necessity to provide high voltages and currents, used for analog voice transmission and substation signalling, as well as, low voltage digital logic signals used for the transmission of digital data between the SLIC and the digital switching network.
The translation of the analog voice signals to PCM encoded digital signals and the interface of the PCM digital signals between the SLIC and the digital switching system is accomplished using a specialized integrated circuit known as a CODEC/FILTER. The CODEC/FILTER converts analog voice signals received from a subscriber line to PCM encoded digital signals. Similarly, PCM encoded digital signals from the digital switching system are converted into analog voice signals for transmission on the subscriber line. One such device is the commercially available as the CODEC/FILTER COMBO.TM., TP305X family of COMBO devices manufactured by the National Semiconductor Company.
These COMBO circuits combine transmit bandpass and receive lowpass channel filters with a companding PCM encoder and decoder that employs either A-law or .mu.-law sampling to convert analog voice signals into 8-bit digital data representations of the voice signals. An included PCM interface transfers the digital voice representations to and from the digital switching network.
Presently known SLIC architectures include in combination a High Voltage Line Interface (HVSLIC) IC with a Low Voltage Line Interface (LVSLIC) IC and a COMBO IC. In this combination the HVSLIC provides power to the subscriber instrument and receives and transmits analog voice signals. One such HVSLIC is described in U.S. patent application Ser. No. 445,516, filed Dec. 4, 1989, entitled "High Voltage Subscriber Line Interface Circuit", having a common assignee with the present invention.
The SLIC must also provide certain signalling and detection functions in order to allow the digital switching system to communicate with a subscriber station. These signaling and detection functions include ringing signal control, ring-trip and loop sense detection as well as detection of abnormal loop conditions.
The LVSLIC IC is normally tasked to provide the above mentioned functions and also to provide the hybrid balance network (two-four wire conversion) and synthesized source impedance for the HVSLIC. The LVSLIC reports the status of the subscriber loop and the SLIC circuit to a central controller of the digital switching system.
One such LVSLIC circuit is described in U.S. patent application Ser. No. 445,826, filed Dec. 4, 1989, entitled "Control Circuit For A Solid State Telephone Line Circuit", having a common assignee with the present invention. The LVSLIC circuit communicates via a data and address bus with a central controller of the digital switching system. Information pertaining to the status of the SLIC and the subscriber line are transmitted from the LVSLIC to the central controller. Operating commands from the central controller are received by the LVSLIC for execution by the SLIC.
The above identified SLICs conform to a circuit architecture that connects in combination an integrated circuit HVSLIC, an LVSLIC, and CODEC/FILTER with discrete components that provide subscriber line configuration and protection. The combination just described interfaces a single subscriber line to the digital switching network of a central office exchange.
Such a SLIC is disclosed in U.S. patent application Ser. No. 445,517, filed Dec. 4, 1989, entitled "A Solid State Telephone Line Circuit", having a common assignee with the present invention.
A SLIC circuit is usually one circuit of a plurality of SLICs that are assembled on a line card. The line card connects a plurality of subscriber lines to the digital switching network. Typically, eight or more SLICs can be found on a single line card. However, each SLIC is susceptible to catastrophic damage due to the environment of the associated subscriber line, such as lightning strikes, power surges, etc. A failure of one SLIC circuit necessitates the replacement of the line card. It is advantageous therefore to be able to replace only those circuits of the line card that are damaged by the aforementioned environmental factors and not the entire line card.
Further, since the LVSLIC acts primarily as a local controller and signal detector between the central controller of the digital switching system and the HVSLIC and COMBO, a certain amount of economy in circuit components can be realized by removing the LVSLIC from the above mentioned combination. By placing the LVSLIC in a more central location the LVSLIC can provide control and detection functions t two or more HVSLIC and COMBO circuits. The hybrid balance function and synthesis of the source impedance however, can not be shared among several circuits and therefore, must still remain a part of the HVSLIC, COMBO combination.
Accordingly, it is an object of the present invention to provide a hybrid balance and combination codec filter (HCOMBO) that provides a circuit that performs analog-to-digital and digital-to-analog conversion, impedance matching and hybrid balance for a subscriber line interface circuit.